Keyword : functional memory

A Hardware/Software Cosynthesis System for Processor Cores with Content Addressable Memories
Nozomu TOGAWA Takao TOTSUKA Tatsuhiko WAKUI Masao YANAGISAWA Tatsuo OHTSUKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/05/01
Vol. E86-A  No. 5 ; pp. 1082-1092
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
content addressable memory, functional memory, micro processor core, hardware/software cosynthesis, hardware/software partitioning, 
 Summary | Full Text:PDF
Architecture and Performance Evaluation of a New Functional Memory: Functional Memory for Addition
Kazutoshi KOBAYASHI Masanao YAMAOKA Yukifumi KOBAYASHI Hidetoshi ONODERA Keikichi TAMARU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/12/25
Vol. E83-A  No. 12 ; pp. 2400-2408
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: VLSI Architecture
Keyword: 
VLSI, functional memory, DRAM, parallel processor, block matching, 
 Summary | Full Text:PDF
CAM Processor Synthesis Based on Behavioral Descriptions
Nozomu TOGAWA Tatsuhiko WAKUI Tatsuhiko YODEN Makoto TERAJIMA Masao YANAGISAWA Tatsuo OHTSUKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/12/25
Vol. E83-A  No. 12 ; pp. 2464-2473
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Co-design and High-level Synthesis
Keyword: 
content addressable memory, functional memory, behavioral synthesis, behavioral description, high-level synthesis, 
 Summary | Full Text:PDF
A Real-Time Low-Rate Video Compression Algorithm Using Multi-Stage Hierarchical Vector Quantization
Kazutoshi KOBAYASHI Kazuhiko TERADA Hidetoshi ONODERA Keikichi TAMARU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/02/25
Vol. E82-A  No. 2 ; pp. 215-222
Type of Manuscript:  Special Section PAPER (Special Section on VLSI for Digital Signal Processing)
Category: 
Keyword: 
vector quantization, functional memory, parallel processor, low-rate image compression, noise robustness, MSHVQ, 
 Summary | Full Text:PDF
A Flexible Search Managing Circuitry for High-Density Dynamic CAMs
Takeshi HAMAMOTO Tadato YAMAGATA Masaaki MIHARA Yasumitsu MURAI Toshifumi KOBAYASHI Hideyuki OZAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/08/25
Vol. E77-C  No. 8 ; pp. 1377-1384
Type of Manuscript:  Special Section PAPER (Special Section on High Speed and High Density Multi Functional LSI Memories)
Category: General Technology
Keyword: 
content addressable memory, associative memory, dynamic memory, functional memory, 
 Summary | Full Text:PDF
The Trend of Functional Memory Development
Keikichi TAMARU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/11/25
Vol. E76-C  No. 11 ; pp. 1545-1554
Type of Manuscript:  INVITED PAPER (Special Issue on LSI Memories)
Category: 
Keyword: 
memory, functional memory, content addressable memory, associative memory, processor array, 
 Summary | Full Text:PDF
Computational Power of Memory-Based Parallel Computation Models with Communication
Yasuhiko TAKENAGA Shuzo YAJIMA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1992/01/25
Vol. E75-D  No. 1 ; pp. 89-94
Type of Manuscript:  Special Section PAPER (Special Section on Theoretical Foundations of Computing)
Category: 
Keyword: 
parallel computation model, computational power, hypercube network, functional memory, memory-based parallel computation, 
 Summary | Full Text:PDF