Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/12/25 Vol. E83-ANo. 12 ;
pp. 2400-2408 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: VLSI Architecture Keyword: VLSI, functional memory, DRAM, parallel processor, block matching,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/12/25 Vol. E83-ANo. 12 ;
pp. 2464-2473 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Co-design and High-level Synthesis Keyword: content addressable memory, functional memory, behavioral synthesis, behavioral description, high-level synthesis,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1994/08/25 Vol. E77-CNo. 8 ;
pp. 1377-1384 Type of Manuscript: Special Section PAPER (Special Section on High Speed and High Density Multi Functional LSI Memories) Category: General Technology Keyword: content addressable memory, associative memory, dynamic memory, functional memory,