Keyword : fully-depleted SOI


A Sub-0.5 V Differential ED-CMOS/SOI Circuit with Over-1-GHz Operation
Takakuni DOUSEKI Toshishige SHIMAMURA Nobutaro SHIBATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/04/01
Vol. E88-C  No. 4 ; pp. 582-588
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power LSI and Low-Power IP)
Category: Digital
Keyword: 
ultralow voltagehigh-speedED-MOSmulti-Vth CMOSfully-depleted SOI
 Summary | Full Text:PDF

Systematic Yield Simulation Methodology Applied to Fully-Depleted SOI MOSFET Process
Noriyuki MIURA Hirokazu HAYASHI Koichi FUKUDA Kenji NISHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/08/25
Vol. E83-C  No. 8 ; pp. 1288-1294
Type of Manuscript:  Special Section PAPER (Special Issue on 1999 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'99))
Category: Simulation Methodology and Environment
Keyword: 
fully-depleted SOIfloating-body effectparasitic channel leakagesystematic yieldprocess optimization
 Summary | Full Text:PDF