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A Low Power and Hardware Efficient Syndrome Key Equation Solver Architecture and Its Folding with Pipelining
Kazuhito ITO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/05/01
Vol. E98-A
No. 5 ;
pp. 1058-1066
Type of Manuscript:
PAPER
Category: VLSI Design Technology and CAD
Keyword:
Reed-Solomon code, syndrome key equation solution, low power, folding, | | | Summary | Full Text:PDF | |
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A Folded VLSI Architecture of Decision Feedback Equalizer for QAM Modem
Hyeongseok YU Byung Wook KIM Jun-Dong CHO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/03/01
Vol. E87-A
No. 3 ;
pp. 628-639
Type of Manuscript:
Special Section PAPER (Special Section on Applications and Implementations of Digital Signal Processing)
Category: Communication Theory and Systems
Keyword:
decision feedback equalizer, QAM, VLSI, FIR filter, folding, | | | Summary | Full Text:PDF | |
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A 10-b 300-MHz Interpolated-Parallel A/D Converter
Hiroshi KIMURA Akira MATSUZAWA Takashi NAKAMURA Shigeki SAWADA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 1993/05/25
Vol. E76-C
No. 5 ;
pp. 778-786
Type of Manuscript:
Special Section PAPER (Special Section on the 1992 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.28, No.4 April 1993))
Category:
Keyword:
A/D converter, parallel, interpolation, high speed, high resolution, linearity, circuit, bipolar, submicrometer, folding, encoder, logic, | | | Summary | Full Text:PDF | |
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