IEICE Trans

Keyword : fault analysis

A Learning-Based Service Function Chain Early Fault Diagnosis Mechanism Based on In-Band Network Telemetry Meiming FU Qingyang LIU Jiayi LIU Xiang WANG Hongyan YANG
Publication: Publication Date: 2022/02/01 Vol. E105-D No. 2 ; pp. 344-354 Type of Manuscript: PAPER Category: Information Network Keyword: SFC, fault analysis, INT, LSTM, SVM,
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Introduction to Electromagnetic Information Security Yu-ichi HAYASHI Naofumi HOMMA
Publication: Publication Date: 2019/01/01 Vol. E102-B No. 1 ; pp. 40-50 Type of Manuscript: INVITED SURVEY PAPER Category: Fundamental Theories for Communications Keyword: EM information security, TEMPEST, side-channel attacks, fault analysis, hardware Trojan horse, electromagnetic compatibility,
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Improved Differential Fault Analysis of SOSEMANUK with Algebraic Techniques Hao CHEN Tao WANG Shize GUO Xinjie ZHAO Fan ZHANG Jian LIU
Publication: Publication Date: 2017/03/01 Vol. E100-A No. 3 ; pp. 811-821 Type of Manuscript: PAPER Category: Cryptography and Information Security Keyword: eSTREAM, SOSEMANUK, algebraic attack, fault analysis, stream ciphers based on ARX operations,
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A Model-Checking Approach for Fault Analysis Based on Configurable Model Extraction Hideto OGAWA Makoto ICHII Tomoyuki MYOJIN Masaki CHIKAHISA Yuichiro NAKAGAWA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2015/06/01 Vol. E98-D No. 6 ; pp. 1150-1160 Type of Manuscript: Special Section PAPER (Special Section on Formal Approach) Category: Model Checking Keyword: model checking, fault analysis, model transformation,
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Differential Fault Analysis on Stream Cipher MUGI Junko TAKAHASHI Toshinori FUKUNAGA Kazuo SAKIYAMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2012/01/01 Vol. E95-A No. 1 ; pp. 242-251 Type of Manuscript: Special Section PAPER (Special Section on Cryptography and Information Security) Category: Implementation Keyword: fault analysis, differential fault analysis (DFA), stream cipher, side-channel analysis, MUGI,
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Fault Analysis of the NTRUEncrypt Cryptosystem Abdel Alim KAMAL Amr YOUSSEF
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2011/04/01 Vol. E94-A No. 4 ; pp. 1156-1158 Type of Manuscript: LETTER Category: Cryptography and Information Security Keyword: NTRU, side channel attacks, fault analysis, public key cryptography,
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A Fault Analytic Method against HB⁺ José CARRIJO Rafael TONICELLI Anderson C.A. NASCIMENTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2011/02/01 Vol. E94-A No. 2 ; pp. 855-859 Type of Manuscript: LETTER Category: Cryptography and Information Security Keyword: fault analysis, authentication protocols, HB⁺ protocol, RFID systems,
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On Clock-Based Fault Analysis Attack for an AES Hardware Using RSL Kazuo SAKIYAMA Kazuo OHTA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/01/01 Vol. E93-A No. 1 ; pp. 172-179 Type of Manuscript: Special Section PAPER (Special Section on Cryptography and Information Security) Category: Cryptanalysis Keyword: fault analysis, random switching logic, AES, clock-based fault analysis attack,
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Analysis and Testing of Bridging Faults in CMOS Synchronous Sequential Circuits Yukiya MIURA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2004/03/01 Vol. E87-D No. 3 ; pp. 564-570 Type of Manuscript: Special Section PAPER (Special Section on Test and Verification of VLSI) Category: Fault Detection Keyword: bridging faults, CMOS synchronous sequential circuits, fault analysis, testing,
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Analysis of I_DDQ Occurrence in Testing Arabi KESHK Yukiya MIURA Kozo KINOSHITA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2001/04/01 Vol. E84-D No. 4 ; pp. 534-536 Type of Manuscript: LETTER Category: Computer System Element Keyword: I_DDQ testing, bridging fault, fault analysis,
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Fault Behavior and Change in Internal Condition of Mixed-Signal Circuits Yukiya MIURA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2000/04/25 Vol. E83-D No. 4 ; pp. 943-945 Type of Manuscript: LETTER Category: Fault Tolerance Keyword: CMOS mixed-signal circuits, fault analysis, MOS transistors, operation regions, testing,
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An Analysis of the Relationship between IDDQ Testability and D-Type Flip-Flop Structure Yukiya MIURA Hiroshi YAMAZAKI
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1998/10/25 Vol. E81-D No. 10 ; pp. 1072-1078 Type of Manuscript: PAPER Category: Fault Tolerant Computing Keyword: IDDQ testing, bridging faults, flip-flops, fault analysis,
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Machine Diagnosis Using Acoustic Signal Processing Techniques and Special Sound Collecting Hood Yoshihito TAMANOI Takashi OHTSUKA Ryoji OHBA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1995/12/25 Vol. E78-A No. 12 ; pp. 1627-1633 Type of Manuscript: Special Section PAPER (Special Section on Acoustic Diagnosis) Category: Keyword: machine diagnosis, acoustic signal processing, fault analysis, digital signal processing,
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Automatic Tracing of Transistor-Level Performance Faults with CAD-Linked Electron Beam Test System Katsuyoshi MIURA Koji NAKAMAE Hiromu FUJIOKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1994/03/25 Vol. E77-A No. 3 ; pp. 539-545 Type of Manuscript: PAPER Category: Computer Aided Design (CAD) Keyword: fault analysis, fault tracing, electron beam testing, performance fault, transistor-level circuits,
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The Enhancement of Electromigration Lifetime under High Frequency Pulsed Conditions Kazunori HIRAOKA Kazumitsu YASUDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1994/01/25 Vol. E77-A No. 1 ; pp. 195-203 Type of Manuscript: Special Section PAPER (Special Section on Reliability) Category: Reliability Testing Keyword: fault analysis, testing and verification, reliability, availability and vulnerability,
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Verification of Register Transfer Level (RTL) Designs Alberto Palacios PAWLOVSKY Sachio NAITO
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1992/11/25 Vol. E75-D No. 6 ; pp. 785-791 Type of Manuscript: Special Section PAPER (Special Issue on Pacific Rim International Symposium on Fault Tolerant Systems) Category: Keyword: fault analysis, testing, verification, hardware description languages, regular expressions, directed graphs,
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Analysis of Engine States and Automobile Features Based on Time-Dependent Spectral Characteristics Yumi TAKIZAWA Shinichi SATO Keisuke ODA Atsushi FUKASAWA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1992/11/25 Vol. E75-A No. 11 ; pp. 1524-1532 Type of Manuscript: Special Section PAPER (Special Section on Acoustic System Modeling and Signal Processing) Category: Keyword: digital signal processing, modeling and simulation, acoustics, signals and waves, fault analysis, testing and verification,
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