Keyword : extended true single phase clock logic

A 1-V TSPC Dual Modulus Prescaler with Speed Scalability Using Forward Body Biasing in 0.18 µm CMOS
Hyunchol SHIN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/06/01
Vol. E95-C  No. 6 ; pp. 1121-1124
Type of Manuscript:  BRIEF PAPER
Category: Electronic Circuits
CMOSprescalerforward body biasextended true single phase clock logic
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