Keyword : exclusive-OR


Via Programmable Structured ASIC Architecture “VPEX3” and CAD Design System
Ryohei HORI Taisuke UEOKA Taku OTANI Masaya YOSHIKAWA Takeshi FUJINO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/12/01
Vol. E95-A  No. 12 ; pp. 2182-2190
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Level Design
Keyword: 
via programmable logic devicestructured ASICexclusive-ORmiddle-volume production
 Summary | Full Text:PDF(3.1MB)

A Fundamental Analysis of Single Event Effects on Clocked CVSL Circuits with Gated Feedback
Hiroshi HATANO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/06/01
Vol. E94-C  No. 6 ; pp. 1131-1134
Type of Manuscript:  BRIEF PAPER
Category: Semiconductor Materials and Devices
Keyword: 
cascade voltage switch logicsingle event effectexclusive-ORradiationsimulation
 Summary | Full Text:PDF(498.9KB)

A Single Event Effect Analysis on Static CVSL Exclusive-OR Circuits
Hiroshi HATANO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/09/01
Vol. E93-C  No. 9 ; pp. 1471-1473
Type of Manuscript:  BRIEF PAPER
Category: Semiconductor Materials and Devices
Keyword: 
cascade voltage switch logicsingle event effectexclusive-ORradiationsimulation
 Summary | Full Text:PDF(311.2KB)