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| Keyword : error model
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Checking Scheme for ABFT Systems Based on Modified PD Graph under an Error Generation/Propagation Model
Choon-Sik PARK Mineo KANEKO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/06/25
Vol. E82-A
No. 6 ;
pp. 1002-1008
Type of Manuscript:
Special Section PAPER (Special Section of Papers Selected from 1998 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '98))
Category:
Keyword:
fault tolerance, processor-data graph, checking scheme, error model, fault detection, fault location, | | | Summary | Full Text:PDF | |
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