Keyword : error floor

An Iterative Decoding Scheme for CPM-QC-LDPC Codes Based on Matrix Transform
Zuohong XU Jiang ZHU Qian CHENG Zixuan ZHANG 
Publication:   
Publication Date: 2019/03/01
Vol. E102-B  No. 3 ; pp. 496-509
Type of Manuscript:  PAPER
Category: Fundamental Theories for Communications
Keyword: 
CPM-QC-LDPC codes, construction, decoding scheme, CPM-RID decoding scheme, bit error rate, error floor, 
 Summary | Full Text:PDF
Message Passing Decoder with Decoding on Zigzag Cycles for Non-binary LDPC Codes
Takayuki NOZAKI Kenta KASAI Kohichi SAKANIWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/04/01
Vol. E97-A  No. 4 ; pp. 975-984
Type of Manuscript:  PAPER
Category: Coding Theory
Keyword: 
non-binary LDPC code, error floor, memoryless binary-input output-symmetric, belief propagation decoder, maximum a posteriori decoding, 
 Summary | Full Text:PDF
Finding Small Fundamental Instantons of LDPC Codes by Path Extension
Junjun GUO Jianjun MU Xiaopeng JIAO Guiping LI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/04/01
Vol. E97-A  No. 4 ; pp. 1001-1004
Type of Manuscript:  LETTER
Category: Coding Theory
Keyword: 
instanton, error floor, low-density parity-check (LDPC) codes, linear programming (LP), 
 Summary | Full Text:PDF
Analysis of Error Floors for Non-binary LDPC Codes over General Linear Group through q-Ary Memoryless Symmetric Channels
Takayuki NOZAKI Kenta KASAI Kohichi SAKANIWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/12/01
Vol. E95-A  No. 12 ; pp. 2113-2121
Type of Manuscript:  Special Section PAPER (Special Section on Information Theory and Its Applications)
Category: Coding Theory
Keyword: 
non-binary LDPC code, error floor, q-ary memoryless symmetric channel, belief propagation, 
 Summary | Full Text:PDF
Lowering Error Floors of Irregular LDPC Codes by Combining Construction and Decoding
Xiaopeng JIAO Jianjun MU Fan FANG Rong SUN 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2012/01/01
Vol. E95-B  No. 1 ; pp. 271-274
Type of Manuscript:  LETTER
Category: Fundamental Theories for Communications
Keyword: 
error floor, low-density parity-check (LDPC) codes, minimum distance, trapping sets, 
 Summary | Full Text:PDF
Analysis of Error Floors of Non-binary LDPC Codes over MBIOS Channel
Takayuki NOZAKI Kenta KASAI Kohichi SAKANIWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/11/01
Vol. E94-A  No. 11 ; pp. 2144-2152
Type of Manuscript:  Special Section PAPER (Special Section on Information Theory and Its Applications)
Category: Coding Theory
Keyword: 
non-binary LDPC code, error floor, MBIOS channel, 
 Summary | Full Text:PDF
Multi-Stage Decoding Scheme with Post-Processing for LDPC Codes to Lower the Error Floors
Beomkyu SHIN Hosung PARK Jong-Seon NO Habong CHUNG 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2011/08/01
Vol. E94-B  No. 8 ; pp. 2375-2377
Type of Manuscript:  LETTER
Category: Fundamental Theories for Communications
Keyword: 
error floor, log-likelihood ratio (LLR), low-density parity-check (LDPC) codes, sum-product algorithm, 
 Summary | Full Text:PDF
Parity-Check Matrix Extension to Lower the Error Floors of Irregular LDPC Codes
Jianjun MU Xiaopeng JIAO Jianguang LIU Rong SUN 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2011/06/01
Vol. E94-B  No. 6 ; pp. 1725-1727
Type of Manuscript:  LETTER
Category: Fundamental Theories for Communications
Keyword: 
error floor, low-density parity-check (LDPC) codes, trapping sets, 
 Summary | Full Text:PDF
Design of High-Rate Serially Concatenated Codes with Low Error Floor
Motohiko ISAKA Philippa A. MARTIN Marc P.C. FOSSORIER 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/09/01
Vol. E90-A  No. 9 ; pp. 1754-1762
Type of Manuscript:  Special Section PAPER (Special Section on Information Theory and Its Applications)
Category: 
Keyword: 
serially concatenated codes, interleaver, error floor, list decoding, 
 Summary | Full Text:PDF
Lowering the Error Floors of Irregular LDPC Code on Fast Fading Environment with Perfect and Imperfect CSIs
Satoshi GOUNAI Tomoaki OHTSUKI Toshinobu KANEKO 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2007/03/01
Vol. E90-B  No. 3 ; pp. 569-577
Type of Manuscript:  PAPER
Category: Wireless Communication Technologies
Keyword: 
irregular Low-Density Parity-Check code, ordered statistic decoding, CRC, error floor, Channel State Information, 
 Summary | Full Text:PDF
Study of Turbo Codes and Decoding in Binary Erasure Channel Based on Stopping Set Analysis
Jeong Woo LEE 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2006/04/01
Vol. E89-B  No. 4 ; pp. 1178-1186
Type of Manuscript:  PAPER
Category: Fundamental Theories for Communications
Keyword: 
turbo codes, iterative decoding, stopping set, block/bit erasure probability, error floor, 
 Summary | Full Text:PDF
Lowering Error Floor of Irregular LDPC Codes by CRC and OSD Algorithm
Satoshi GOUNAI Tomoaki OHTSUKI 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2006/01/01
Vol. E89-B  No. 1 ; pp. 1-10
Type of Manuscript:  PAPER
Category: Fundamental Theories for Communications
Keyword: 
irregular low-density parity-check code, log-likelihood ratio belief propagation, ordered statistic decoding, CRC, error floor, maximum likelihood decoding, 
 Summary | Full Text:PDF