Keyword : erase algorithm


2V/120 ns Embedded Flash EEPROM Circuit Technology
Horoshige HIRANO Toshiyuki HONDA Shigeo CHAYA Takahiro FUKUMOTO Tatsumi SUMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/06/25
Vol. E79-C  No. 6 ; pp. 825-831
Type of Manuscript:  Special Section PAPER (Special Issue on ULSI Memory Technology)
Category: Nonvolatile memories
Keyword: 
flash memorylow voltage operationerase algorithmboost circuit
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