IEICE SEARCH SYSTEM

Keyword : embedded system

A New Method of Storing Integral Image for Memory Efficiency Using Modified Block Structure Su-hyun LEE Yong-jin JEONG
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2015/10/01 Vol. E98-D No. 10 ; pp. 1888-1891 Type of Manuscript: LETTER Category: Image Processing and Video Processing Keyword: integral image, image processing, image recognition, embedded system,
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A New Integral Image Structure for Memory Size Reduction Su-hyun LEE Yong-jin JEONG
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2014/04/01 Vol. E97-D No. 4 ; pp. 998-1000 Type of Manuscript: LETTER Category: Image Processing and Video Processing Keyword: integral image, image processing, image recognition, embedded system,
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Robust Lightweight Embedded Virtualization Layer Design with Simple Hardware Assistance Tsung-Han LIN Yuki KINEBUCHI Tatsuo NAKAJIMA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2012/12/01 Vol. E95-D No. 12 ; pp. 2821-2832 Type of Manuscript: Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking) Category: Computer System and Services Keyword: operating system, embedded system, virtualization, local memory, scratch-pad memory,
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Practical Orientation Field Estimation for Embedded Fingerprint Recognition Systems Yukun LIU Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2011/09/01 Vol. E94-D No. 9 ; pp. 1792-1799 Type of Manuscript: PAPER Category: Pattern Recognition Keyword: fingerprint recognition, orientation field, binary pattern, embedded system,
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Improved Dictionary-Based Code-Compression Schemes with XOR Reference for RISC/VLIW Architecture Jui-Chun CHEN Chang-Hong LIN
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/12/01 Vol. E93-A No. 12 ; pp. 2517-2523 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: High-Level Synthesis and System-Level Design Keyword: dictionary-based code-compression, embedded system,
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A Parallel Branching Program Machine for Sequential Circuits: Implementation and Evaluation Hiroki NAKAHARA Tsutomu SASAO Munehiro MATSUURA Yoshifumi KAWAMURA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/08/01 Vol. E93-D No. 8 ; pp. 2048-2058 Type of Manuscript: Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing) Category: Logic Design Keyword: embedded system, branching program machine, multi-processing, BDD,
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A Concurrent Instruction Scheduling and Recoding Algorithm for Power Minimization in Embedded Systems Sung-Rae LEE Ser-Hoon LEE Sun-Young HWANG
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/08/01 Vol. E93-D No. 8 ; pp. 2162-2171 Type of Manuscript: PAPER Category: Software System Keyword: embedded system, low-power, instruction scheduling, recoding,
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A Two-Level Cache Design Space Exploration System for Embedded Applications Nobuaki TOJO Nozomu TOGAWA Masao YANAGISAWA Tatsuo OHTSUKI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-A No. 12 ; pp. 3238-3247 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Embedded, Real-Time and Reconfigurable Systems Keyword: two-level cache, L1/L2, cache optimization, design space exploration, cache simulation, embedded system,
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Multi-Core/Multi-IP Technology for Embedded Applications Naohiko IRIE Toshihiro HATTORI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2009/10/01 Vol. E92-C No. 10 ; pp. 1232-1239 Type of Manuscript: INVITED PAPER (Special Section on Hardware and Software Technologies on Advanced Microprocessors) Category: Keyword: SoC, multi-core, embedded system, platform,
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An L1 Cache Design Space Exploration System for Embedded Applications Nobuaki TOJO Nozomu TOGAWA Masao YANAGISAWA Tatsuo OHTSUKI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/06/01 Vol. E92-A No. 6 ; pp. 1442-1453 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: cache, cache optimization, design space exploration, cache simulation, embedded system,
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Low Cost Time Synchronization Protocol for Wireless Sensor Network Ki-Hyeon KIM Won-Kee HONG Hie-Cheol KIM
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2009/04/01 Vol. E92-B No. 4 ; pp. 1137-1143 Type of Manuscript: Special Section PAPER (Special Section on Internet Technology and its Architecture for Ambient Information Systems) Category: Keyword: time synchronization, WSN, embedded system, wireless communication, mobile network,
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Design and Evaluation of Data-Dependent Hardware for AES Encryption Algorithm Ryoichiro ATONO Shuichi ICHIKAWA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2006/07/01 Vol. E89-D No. 7 ; pp. 2301-2305 Type of Manuscript: LETTER Category: VLSI Systems Keyword: FPGA, custom circuit, partial evaluation, specialization, cryptography, embedded system,
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A Low Power-Consuming Embedded System Design by Reducing Memory Access Frequencies Ching-Wen CHEN Chih-Hung CHANG Chang-Jung KU
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2005/12/01 Vol. E88-D No. 12 ; pp. 2748-2756 Type of Manuscript: PAPER Category: Computer Systems Keyword: embedded system, code compress, power consumption, performance,
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Transient Bit Error Recovery Scheme for ROM-Based Embedded Systems Sang-Moon RYU Dong-Jo PARK
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2005/09/01 Vol. E88-D No. 9 ; pp. 2209-2212 Type of Manuscript: LETTER Category: Dependable Computing Keyword: transient bit error, memory scrubbing, reliability, embedded system,
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Architecture of IEEE802.11i Cipher Algorithms for Embedded Systems Yukio MITSUYAMA Motoki KIMURA Takao ONOYE Isao SHIRAKAWA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/04/01 Vol. E88-A No. 4 ; pp. 899-906 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 17th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: IEEE802.11i, WEP, TKIP, AES-CCM, embedded system, low hardware cost,
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Web-Based Monitoring and Control for BAS Using Multi-Protocol Converter with Embedded Linux Byoung Wook CHOI Kyoung Chul KOH Soo Yeong YI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/03/01 Vol. E88-C No. 3 ; pp. 450-457 Type of Manuscript: PAPER Category: Electronic Instrumentation and Control Keyword: remote monitoring and control, Web-based control, embedded system, LonWorks network, BAS,
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Binary Line-Pattern Algorithm for Embedded Fingerprint Authentication System Jinqing QI Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/08/01 Vol. E87-A No. 8 ; pp. 1879-1886 Type of Manuscript: Special Section PAPER (Special Section on Digital Signal Processing) Category: Image/Visual Signal Processing Keyword: fingerprint authentication, line-pattern, embedded system,
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Fast Fingerprint Classification Based on Direction Pattern Jinqing QI Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/08/01 Vol. E87-A No. 8 ; pp. 1887-1892 Type of Manuscript: Special Section PAPER (Special Section on Digital Signal Processing) Category: Image/Visual Signal Processing Keyword: fingerprint classification, direction pattern, embedded system,
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Performance Estimation at Architecture Level for Embedded Systems Hiroshi MIZUNO Hiroyuki KOBAYASHI Takao ONOYE Isao SHIRAKAWA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/12/01 Vol. E85-A No. 12 ; pp. 2636-2644 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Performance Estimation Keyword: power dissipation, architecture, embedded system, co-design,
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A System Level Optimization Technique for Application Specific Low Power Memories Tohru ISHIHARA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/11/01 Vol. E84-A No. 11 ; pp. 2755-2761 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Optimization of Power and Timing Keyword: low power design, hardware/software codesign, memory, low voltage, embedded system,
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Register Constraint Analysis to Minimize Spill Code for Application Specific DSPs Tatsuo WATANABE Nagisa ISHIURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/06/01 Vol. E84-A No. 6 ; pp. 1541-1544 Type of Manuscript: Special Section LETTER (Special Section on Papers Selected from 2000 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2000)) Category: Keyword: application specific DSP, spill code insertion, embedded system, scheduling, register constraint analysis,
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Towards the System LSI Design Technology Hiroto YASUURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/01/01 Vol. E84-A No. 1 ; pp. 91-97 Type of Manuscript: INVITED PAPER (Special Section on the 10th Anniversary of the IEICE Transactions of Fundamentals: "Last Decade and 21st Century") Category: Keyword: system LSI, system on a chip, embedded system, soft-core processor,
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Multicriteria Codesign Optimization for Embedded Multimedia Communication System I-Horng JENG Feipei LAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/12/25 Vol. E83-A No. 12 ; pp. 2474-2487 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Co-design and High-level Synthesis Keyword: hardware/software codesign, multicriteria optimization, embedded system, multimedia communications, information appliance,
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A Memory Power Optimization Technique for Application Specific Embedded Systems Tohru ISHIHARA Hiroto YASUURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/11/25 Vol. E82-A No. 11 ; pp. 2366-2374 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: low power design, hardware/software codesign, memory, embedded system,
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Polling-Based Real-Time Software for MPEG2 System Protocol LSIs Jiro NAGANUMA Makoto ENDO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/05/25 Vol. E81-C No. 5 ; pp. 695-701 Type of Manuscript: Special Section PAPER (Special Issue on Multimedia, Network, and DRAM LSIs) Category: Keyword: MPEG2, protocol processing, multiplexer/demultiplexer, real-time software, embedded system, HW/SW co-design, VLSI,
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A Method for Design of Embedded Systems for Multimedia Applications Katsuhiko SEO Hisao KOIZUMI Barry SHACKLEFORD Masashi MORI Takashi KUSUHARA Hirotaka KIMURA Fumio SUZUKI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/05/25 Vol. E81-C No. 5 ; pp. 725-732 Type of Manuscript: Special Section PAPER (Special Issue on Multimedia, Network, and DRAM LSIs) Category: Keyword: co-verification, co-design, co-simulation, co-emulation, embedded system, component logical bus,
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Top-Down Co-simulation of Hardware/Software Co-designs for Embedded Systems Based Upon a Component Logical Bus Architecture Katsuhiko SEO Hisao KOIZUMI Barry SHACKLEFORD Mitsuhiro YASUDA Masashi MORI Fumio SUZUKI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/10/25 Vol. E80-A No. 10 ; pp. 1834-1841 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: co-design, co-simulation, embedded system, component logical bus,
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