Keyword : electrostatic discharge (ESD)


A Novel Technique to Suppress Multiple-Triggering Effect in Typical DTSCRs under ESD Stress
Lizhong ZHANG Yuan WANG Yandong HE 
Publication:   
Publication Date: 2020/05/01
Vol. E103-C  No. 5 ; pp. 274-278
Type of Manuscript:  BRIEF PAPER
Category: Semiconductor Materials and Devices
Keyword: 
electrostatic discharge (ESD)transmission-line-pulsing (TLP)very-fast-transmission-line-pulsing (VF-TLP)multiple-triggeringdiode-triggered silicon controlled rectifier (DTSCR)
 Summary | Full Text:PDF(2.4MB)

Silicon Controlled Rectifier Based Partially Depleted SOI ESD Protection Device for High Voltage Application
Yibo JIANG Hui BI Hui LI Zhihao XU Cheng SHI 
Publication:   
Publication Date: 2020/04/01
Vol. E103-C  No. 4 ; pp. 191-193
Type of Manuscript:  BRIEF PAPER
Category: Semiconductor Materials and Devices
Keyword: 
electrostatic discharge (ESD)silicon on insulator (SOI)high voltage protectionbody-tie side triggering diode inserting silicon controlled rectifier (BSTDISCR)
 Summary | Full Text:PDF(3.4MB)

Latch-Up Immune Bi-Direction ESD Protection Clamp for Push-Pull RF Power Amplifier
Yibo JIANG Hui BI Wei ZHAO Chen SHI Xiaolei WANG 
Publication:   
Publication Date: 2020/04/01
Vol. E103-C  No. 4 ; pp. 194-196
Type of Manuscript:  BRIEF PAPER
Category: Semiconductor Materials and Devices
Keyword: 
electronic reliabilityelectrostatic discharge (ESD)bi-direction protectionpush-pull amplifier
 Summary | Full Text:PDF(1.2MB)

Design and Impact on ESD/LU Immunities by Drain-Side Super-Junction Structures in Low-(High-)Voltage MOSFETs for the Power Applications
Shen-Li CHEN Yu-Ting HUANG Shawn CHANG 
Publication:   
Publication Date: 2018/03/01
Vol. E101-C  No. 3 ; pp. 143-150
Type of Manuscript:  PAPER
Category: Electromagnetic Theory
Keyword: 
electrostatic discharge (ESD)holding voltage (Vh)n-channel lateral-diffused MOSFET (nLDMOS)secondary breakdown current (It2)super-junction (SJ)trigger voltage (Vt1)
 Summary | Full Text:PDF(1.4MB)

Design of High-ESD Reliability in HV Power pLDMOS Transistors by the Drain-Side Isolated SCRs
Shen-Li CHEN Yu-Ting HUANG Yi-Cih WU 
Publication:   
Publication Date: 2017/05/01
Vol. E100-C  No. 5 ; pp. 446-452
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
electrostatic discharge (ESD)holding voltage (Vh)P-channel lateral-diffused metal-oxide-semiconductor (pLDMOS)secondary breakdown current (It2)transmission-line pulse (TLP)trigger voltage (Vt1)
 Summary | Full Text:PDF(1.8MB)

Power-Rail ESD Clamp Circuit with Parasitic-BJT and Channel Parallel Shunt Paths to Achieve Enhanced Robustness
Yuan WANG Guangyi LU Yize WANG Xing ZHANG 
Publication:   
Publication Date: 2017/03/01
Vol. E100-C  No. 3 ; pp. 344-347
Type of Manuscript:  BRIEF PAPER
Category: Semiconductor Materials and Devices
Keyword: 
electrostatic discharge (ESD)robustnessfalse-triggering immunitytransmission-line-pulsing (TLP) test
 Summary | Full Text:PDF(814.4KB)

Optimization on Layout Strategy of Gate-Grounded NMOS for On-Chip ESD Protection in a 65-nm CMOS Process
Guangyi LU Yuan WANG Xing ZHANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/05/01
Vol. E99-C  No. 5 ; pp. 590-596
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
electrostatic discharge (ESD)gate-grounded NMOS (ggNMOS)substrate-pickup stripestransmission-line-pulsing (TLP) test
 Summary | Full Text:PDF(1.7MB)

A Non-snapback ESD Protection Clamp Circuit Using Isolated Parasitic Capacitance in a 0.35 µm Bipolar-CMOS-DMOS Process
Jae-Young PARK Dae-Woo KIM Young-Sang SON Jong-Kyu SONG Chang-Soo JANG Won-Young JUNG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/05/01
Vol. E94-C  No. 5 ; pp. 796-801
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
electrostatic discharge (ESD)non-snapback characteristicsgate-coupled effectisolated parasitic capacitanceBipolar-CMOS-DMOS process
 Summary | Full Text:PDF(1.1MB)

An Unassisted Low-Voltage-Trigger ESD Protection Structure in a 0.18-µm CMOS Process without Extra Process Cost
Bing LI Yi SHAN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/08/01
Vol. E93-C  No. 8 ; pp. 1359-1364
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
electrostatic discharge (ESD)unassistedlow-voltage-triggertransmission line pulse (TLP)trigger voltagesecond breakdown currentmask
 Summary | Full Text:PDF(520.7KB)

On-Chip Charged Device Model ESD Protection Design Method Using Very Fast Transmission Line Pulse System for RF ICs
Jae-Young PARK Jong-Kyu SONG Dae-Woo KIM Chang-Soo JANG Won-Young JUNG Taek-Soo KIM 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/05/01
Vol. E93-C  No. 5 ; pp. 625-630
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: Analog/RF Devices
Keyword: 
electrostatic discharge (ESD)charged device model (CDM)very-fast transmission line pulse systemlow voltage triggered SCR devicesradio pulse integrated circuits (RF ICs)
 Summary | Full Text:PDF(4.9MB)

Design of SCR-Based ESD Protection Device for Power Clamp Using Deep-Submicron CMOS Technology
Yongseo KOO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/09/01
Vol. E92-C  No. 9 ; pp. 1188-1193
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
electrostatic discharge (ESD)silicon controlled rectifier (SCR)power clamplatch-up issueholding voltagetriggering current
 Summary | Full Text:PDF(1.4MB)

Impedance-Isolation Technique for ESD Protection Design in RF Integrated Circuits
Ming-Dou KER Yuan-Wen HSIAO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/03/01
Vol. E92-C  No. 3 ; pp. 341-351
Type of Manuscript:  PAPER
Category: Electronic Components
Keyword: 
electrostatic discharge (ESD)impedance-isolation techniqueLC-tanknoise figure power gain
 Summary | Full Text:PDF(1.7MB)

Low-Capacitance and Fast Turn-on SCR for RF ESD Protection
Chun-Yu LIN Ming-Dou KER Guo-Xuan MENG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/08/01
Vol. E91-C  No. 8 ; pp. 1321-1330
Type of Manuscript:  Special Section PAPER (Special Section on Microelectronic Test Structures (ICMTS2007))
Category: 
Keyword: 
electrostatic discharge (ESD)low capacitance (low-C)power amplifier (PA)radio-frequency (RF)silicon-controlled rectifier (SCR)waffle layout
 Summary | Full Text:PDF(2.1MB)

MOS-Bounded Diodes for On-Chip ESD Protection in Deep Submicron CMOS Process
Ming-Dou KER Kun-Hsien LIN Che-Hao CHUANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/03/01
Vol. E88-C  No. 3 ; pp. 429-436
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
electrostatic discharge (ESD)diodepoly-bounded diodeMOS-bounded diodeESD protection
 Summary | Full Text:PDF(1.3MB)