Keyword : dual-rail pre-charge logic style

An Analysis of Leakage Factors for Dual-Rail Pre-Charge Logic Style
Daisuke SUZUKI Minoru SAEKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/01/01
Vol. E91-A  No. 1 ; pp. 184-192
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: Side Channel Attacks
side-channel attacksdifferential power analysishardware countermeasuredual-rail pre-charge logic styleCMOS logic circuit
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