Keyword : dual-gate PMOSFETs

Analysis of Boron Penetration and Gate Depletion Using Dual-Gate PMOSFETs for High Performance G-Bit DRAM Design
Norikatsu TAKAURA Ryo NAGAI Hisao ASAKURA Satoru YAMADA Shin'ichiro KIMURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/05/01
Vol. E85-C  No. 5 ; pp. 1138-1145
Type of Manuscript:  Special Section PAPER (Special Issue on Microelectronic Test Structures)
boron penetrationgate depletiondual-gate PMOSFETsVth fluctuationG-bit DRAM
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