Keyword : double via


Post-Routing Double-Via Insertion for X-Architecture Clock Tree Yield Improvement
Chia-Chun TSAI Chung-Chieh KUO Trong-Yen LEE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/02/01
Vol. E94-A  No. 2 ; pp. 706-716
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
clock routingdesign for manufacturabilitydouble viaX-architecture
 Summary | Full Text:PDF(2.1MB)

Redundant via Insertion: Removing Design Rule Conflicts and Balancing via Density
Song CHEN Jianwei SHEN Wei GUO Mei-Fang CHIANG Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12 ; pp. 2372-2379
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Level Design
Keyword: 
redundant viadouble viadesign for manufacturabilityvia density
 Summary | Full Text:PDF(1.2MB)