Keyword : double rail flip-flop


3-Gb/s CMOS 1:4 MUX and DEMUX ICs
Sadayuki YASUDA Yusuke OHTOMO Masayuki INO Yuichi KADO Toshiaki TSUCHIYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/12/25
Vol. E78-C  No. 12 ; pp. 1746-1753
Type of Manuscript:  Special Section PAPER (Special Issue on Low-power Analog, Digital LSIs and ASICs for Multimedia)
Category: 
Keyword: 
CMOSMUX/DEMUXdouble rail flip-flopphaseinternal mean capacitanceSIMOX device process technology
 Summary | Full Text:PDF