Keyword : double modular redundancy


Register Minimization and its Application in Schedule Exploration for Area Minimization for Double Modular Redundancy LSI Design
Yuya KITAZAWA Kazuhito ITO 
Publication:   
Publication Date: 2022/03/01
Vol. E105-A  No. 3 ; pp. 530-539
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
double modular redundancyregister minimizationsoft errorLSI design
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