Keyword : digital calibration

A Fast Settling All Digital PLL Using Temperature Compensated Oscillator Tuning Word Estimation Algorithm
Keisuke OKUNO Shintaro IZUMI Kana MASAKI Hiroshi KAWAGUCHI Masahiko YOSHIMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/12/01
Vol. E98-A  No. 12 ; pp. 2592-2599
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Circuit Design
Keyword: 
ADPLL, fast settling, digital calibration, timing error correction, temperature compensation, 
 Summary | Full Text:PDF(2.7MB)
100–1000 MHz Programmable Continuous-Time Filter with Auto-Tuning Schemes and Digital Calibration Sequences for HDD Read Channels
Takahide TERADA Koji NASU Taizo YAMAWAKI Masaru KOKUBO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/06/01
Vol. E95-C  No. 6 ; pp. 1050-1058
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
Gm-C filter, biquad filter, digitally assisted compensation, auto tuning, digital calibration, analog front end, 
 Summary | Full Text:PDF(3.4MB)
Digital Calibration and Correction Methods for CMOS Analog-to-Digital Converters
Shiro DOSHO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4 ; pp. 421-431
Type of Manuscript:  INVITED PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
analog circuits, Moore's law, high performance, system LSIs, miniaturization, digital calibration, correction, 
 Summary | Full Text:PDF(1.8MB)
Trends in Low-Power, Digitally Assisted A/D Conversion
Boris MURMANN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/06/01
Vol. E93-C  No. 6 ; pp. 718-729
Type of Manuscript:  INVITED PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
A/D conversion, digital calibration, digitally assisted design, technology scaling, 
 Summary | Full Text:PDF(3.3MB)
Techniques for Digitally Assisted Pipeline A/D Converters
Shoji KAWAHITO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/06/01
Vol. E91-C  No. 6 ; pp. 829-836
Type of Manuscript:  INVITED PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
pipeline ADC, capacitor mismatch, digital calibration, background calibration, 
 Summary | Full Text:PDF(1.1MB)
Digital Calibration Method for Binary-Weighted Current-Steering D/A-Converters without Calibration ADC
Yusuke IKEDA Akira MATSUZAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/06/01
Vol. E90-C  No. 6 ; pp. 1172-1180
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
digital-to-analog converter, digital calibration, self-calibration, high resolution, 
 Summary | Full Text:PDF(1.1MB)
A Digital Calibration Technique of Capacitor Mismatch for Pipelined Analog-to-Digital Converters
Masanori FURUTA Shoji KAWAHITO Daisuke MIYAZAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/08/01
Vol. E85-C  No. 8 ; pp. 1562-1568
Type of Manuscript:  Special Section PAPER (Special Issue on High-Performance Analog Integrated Circuits)
Category: 
Keyword: 
pipelined ADC, parallel pipelined ADC, digital calibration, error measurement, 
 Summary | Full Text:PDF(435.5KB)