Keyword : design reuse


Quality-Driven Design for Video Applications
Yun CAO Hiroto YASUURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/12/01
Vol. E85-A  No. 12 ; pp. 2568-2576
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Design Methodology
Keyword: 
quality-driven designvariable analysisdesign reuseapplication-specific optimization
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Data Driven Power Saving for DCT/IDCT VLSI Macrocell
Luca FANUCCI Sergio SAPONARA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/07/01
Vol. E85-A  No. 7 ; pp. 1760-1765
Type of Manuscript:  LETTER
Category: VLSI Design Technology and CAD
Keyword: 
very large scale integration architectureslow power designdesign reuseclock gatingvideo coding
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Program Slicing on VHDL Descriptions and Its Evaluation
Shigeru ICHINOSE Mizuho IWAIHARA Hiroto YASUURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/12/25
Vol. E81-A  No. 12 ; pp. 2585-2594
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Design Reuse
Keyword: 
hardware description languageVHDLprogram slicingdesign reusecomponent extraction
 Summary | Full Text:PDF

Reclocking Controllers for Minimum Execution Time
Pradip JHA Sri PARAMESWARAN Nikil DUTT 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1995/12/25
Vol. E78-A  No. 12 ; pp. 1715-1721
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
reclockinghigh-level synthesisdesign reuse
 Summary | Full Text:PDF