Keyword : cut enumeration


Efficient Cut Enumeration Heuristics for Depth-Optimum Technology Mapping for LUT-Based FPGAs
Taiga TAKATA Yusuke MATSUNAGA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/12/01
Vol. E92-A  No. 12 ; pp. 3268-3275
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Embedded, Real-Time and Reconfigurable Systems
Keyword: 
FPGAtechnology mappingcut enumeration
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