Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/03/01 Vol. E89-CNo. 3 ;
pp. 356-363 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era) Category: Signal Integrity and Variability Keyword: multi-ported register file, self timing circuits, PVT variation, crosstalk noise,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/12/01 Vol. E87-ANo. 12 ;
pp. 3251-3257 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Physical Design Keyword: crosstalk noise, capacitive coupling noise, transistor sizing, gate sizing, post-layout optimization,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/12/01 Vol. E86-ANo. 12 ;
pp. 2965-2973 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Parasitics and Noise Keyword: crosstalk noise, capacitive coupling, noise estimation, signal integrity,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2003/08/01 Vol. E86-CNo. 8 ;
pp. 1649-1656 Type of Manuscript: Special Section PAPER (Special Issue on Microwave and Millimeter Wave Technology) Category: Keyword: crosstalk noise, signal integrity, line parameter extraction method,
Non-uniform Multi-Layer IC Interconnect Transmission Line Characterization for Fast Signal Transient Simulation of High-Speed/High-Density VLSI Circuits Woojin JINHanjong YOOYungseon EO
