Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2009/04/01 Vol. E92-CNo. 4 ;
pp. 483-491 Type of Manuscript: Special Section PAPER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era) Category: Keyword: worst-case design, timing error, co-simulation, parameter variation,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/11/25 Vol. E82-ANo. 11 ;
pp. 2475-2484 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: cache memories, co-simulation,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/10/25 Vol. E80-ANo. 10 ;
pp. 1834-1841 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: co-design, co-simulation, embedded system, component logical bus,
