Keyword : clock-recovery circuit


A Hierarchical Timing Adjuster Featuring Intermittent Measurement for Use in Low-Power DDR SDRAMs
Satoru HANZAWA Hiromasa NODA Takeshi SAKATA Osamu NAGASHIMA Sadayuki MORITA Masanori ISODA Michiyo SUZUKI Sadayuki OHKUMA Kyoko MURAKAMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/08/01
Vol. E85-C  No. 8 ; pp. 1625-1633
Type of Manuscript:  PAPER
Category: Optoelectronics
Keyword: 
clock-recovery circuittiming adjusterdelay lineDDR SDRAM
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