Keyword : clock-gating


High Launch Switching Activity Reduction in At-Speed Scan Testing Using CTX: A Clock-Gating-Based Test Relaxation and X-Filling Scheme
Kohei MIYASE Xiaoqing WEN Hiroshi FURUKAWA Yuta YAMATO Seiji KAJIHARA Patrick GIRARD Laung-Terng WANG Mohammad TEHRANIPOOR 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/01/01
Vol. E93-D  No. 1 ; pp. 2-9
Type of Manuscript:  Special Section PAPER (Special Section on Test, Diagnosis and Verification of SOCs)
Category: 
Keyword: 
power supply noisetest relaxationX-fillingclock-gatingtest compaction
 Summary | Full Text:PDF

A Low-Power MPEG-4 Codec LSI for Mobile Video Application
Peilin LIU Li JIANG Hiroshi NAKAYAMA Toshiyuki YOSHITAKE Hiroshi KOMAZAKI Yasuhiro WATANABE Hisakatsu ARAKI Kiyonori MORIOKA Shinhaeng LEE Hajime KUBOSAWA Yukio OTOBE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/04/01
Vol. E86-C  No. 4 ; pp. 652-660
Type of Manuscript:  Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies)
Category: Design Methods and Implementation
Keyword: 
MPEG-4 codec LSIclock-gatingmotion-estimation algorithmerror resilience
 Summary | Full Text:PDF