IEICE Trans

Keyword : clock recovery

A 24 mW 5.7 Gbps Dual Frequency Conversion Demodulator for Impulse Radio with the First Sidelobe Kaoru KOHIRA Naoki KITAZAWA Hiroki ISHIKURO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2016/10/01 Vol. E99-C No. 10 ; pp. 1164-1173 Type of Manuscript: Special Section PAPER (Special Section on Microwave and Millimeter-Wave Technology) Category: Keyword: clock recovery, impulse radio, UWB, sidelobe,
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Symbol-Rate Clock Recovery for Integrating DFE Receivers Tsutomu TAKEYA Tadahiro KURODA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2013/03/01 Vol. E96-A No. 3 ; pp. 705-712 Type of Manuscript: PAPER Category: Communication Theory and Signals Keyword: serial link, clock recovery, decision feedback equalizer (DFE), integrating DFE, receiver architecture,
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Injection-Locked Clock Recovery Using a Multiplexed Oscillator for Half-Rate Data-Recovered Applications Ching-Yuan YANG Ken-Hao CHANG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/01/01 Vol. E91-A No. 1 ; pp. 409-412 Type of Manuscript: LETTER Category: VLSI Design Technology and CAD Keyword: clock recovery, data recovery, injection-locked oscillation,
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A 1.25-Gb/s Burst-Mode Half-Rate Clock and Data Recovery Circuit Using Realigned Oscillation Ching-Yuan YANG Jung-Mao LIN
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2007/01/01 Vol. E90-C No. 1 ; pp. 196-200 Type of Manuscript: LETTER Category: Electronic Circuits Keyword: burst-mode CDR, clock recovery, phase-locked loop, realigned oscillation,
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A New Phase Detector Scheme for Reducing Jitter in Clock Recovery Circuits Kang-Yoon LEE Deog-Kyoon JEONG
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2003/02/01 Vol. E86-C No. 2 ; pp. 224-228 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: phase detector, jitter, clock recovery, PLL,
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An All-Digital Clock Recovery and Data Retiming Circuitry for High Speed NRZ Data Communications Muhammad E.S. ELRABAA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2002/05/01 Vol. E85-C No. 5 ; pp. 1170-1176 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: clock recovery, low-power digital CMOS circuits,
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A Dynamically Configurable Multi-Format PSK Demodulator for Digital HDTV Using Broadcasting-Satellite Eiji ARITA Takashi FUJIWARA Kin-ichiro NISHIYAMA Akiko MAENO Yasuo MATSUNAMI Masahiko NAKAMURA Hirohisa MACHIDA Shuji MURAKAMI Hiroyuki NAKAYAMA Masahiko YOSHIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2001/02/01 Vol. E84-C No. 2 ; pp. 166-174 Type of Manuscript: Special Section PAPER (Special Issue on Low-Power High-Performance VLSI Processors and Technologies) Category: Keyword: BS digital, carrier recovery, clock recovery, digital demodulation,
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Dual-Loop Digital PLL Design for Adaptive Clock Recovery Tae Hun KIM Beomsup KIM
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/12/25 Vol. E81-A No. 12 ; pp. 2509-2514 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Transistor-level Circuit Analysis, Design and Verification Keyword: digital PLL, DPLL, PLL, adaptive algorithm, clock recovery,
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A 156Mb/s CMOS Clock Recovery Circuit for Burst-Mode Transmission Makoto NAKAMURA Noboru ISHIHARA Yukio AKAZAWA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/02/25 Vol. E80-A No. 2 ; pp. 296-303 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques for System-on-Chip Integration) Category: Keyword: FTTH, burst-mode transmission, clock recovery, gated VCO, CMOS,
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Analysis of Cycle Slip in Clock Recovery on Frequency-Selective Nakagami-Rice Fading Channels Based on the Equivalent Transmission-Path Model Yoshio KARASAWA Tomonori KURODA Hisato IWAI
Publication: IEICE TRANSACTIONS on Communications Publication Date: 1996/12/25 Vol. E79-B No. 12 ; pp. 1900-1910 Type of Manuscript: PAPER Category: Radio Communication Keyword: frequency-selective fading, Nakagami-Rice fading, cycle slip, clock recovery, equivalent transmission-path model,
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Stuff Synchronization Circuit Design for HDTV Transmission on SDH Network Yasuyuki OKUMURA Ryozo KISHIMOTO
Publication: IEICE TRANSACTIONS on Communications Publication Date: 1994/12/25 Vol. E77-B No. 12 ; pp. 1614-1620 Type of Manuscript: PAPER Category: Communication Device and Circuit Keyword: HDTV, SDH, stuff jitter, clock recovery,
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