Keyword : clock multiplier


A Jitter Suppression Technique for a Clock Multiplier
Kiyoshi ISHII Keiji KISHINE Haruhiko ICHINO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/04/25
Vol. E83-C  No. 4 ; pp. 647-651
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
clock multiplierphase-locked loopSAW filterjitter generationjitter transfer function
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