Keyword : clock generation


An 18 µW Spur Cancelled Clock Generator for Recovering Receiver Sensitivity in Wireless SoCs
Yosuke OGASAWARA Ryuichi FUJIMOTO Tsuneo SUZUKI Kenichi SAMI 
Publication:   
Publication Date: 2017/06/01
Vol. E100-C  No. 6 ; pp. 529-538
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Their Application Technologies)
Category: 
Keyword: 
spurclock spurSCCGSSCGBLEsensitivity recoveryclock generationsystem on chip
 Summary | Full Text:PDF

A Wide-Range Multiphase Delay-Locked Loop Using Mixed-Mode VCDLs
Rong-Jyi YANG Shen-Iuan LIU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/06/01
Vol. E88-C  No. 6 ; pp. 1248-1252
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
Category: PLL
Keyword: 
DLLclock generationwide rangeduty cycle correction
 Summary | Full Text:PDF