Keyword : clock data recovery (CDR)


A 0.6-V Adaptive Voltage Swing Serial Link Transmitter Using Near Threshold Body Bias Control and Jitter Estimation
Yoshihide KOMATSU Akinori SHINMYO Mayuko FUJITA Tsuyoshi HIRAKI Kouichi FUKUDA Noriyuki MIURA Makoto NAGATA 
Publication:   
Publication Date: 2020/10/01
Vol. E103-C  No. 10 ; pp. 497-504
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Their Application Technologies)
Category: Electronic Circuits
Keyword: 
adaptive voltagetransmitterforward-body-bias (FBB)self-adjustedthreshold voltageaggressorjitter estimationprocess-voltage-temperature (PVT)clock data recovery (CDR)
 Summary | Full Text:PDF

1.5–9.7-Gb/s Complete 4-PAM Serial Link Transceiver with a Wide Frequency Range CDR
Bongsub SONG Kyunghoon KIM Junan LEE Kwangsoo KIM Younglok KIM Jinwook BURM 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/08/01
Vol. E96-C  No. 8 ; pp. 1048-1053
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
high-speed integrated circuitspulse-amplitude modulation (PAM)serial-linkclock data recovery (CDR)
 Summary | Full Text:PDF