Keyword : circuit performance

Influence of Energy Transport Related Effects on NPN BJT Device Performance and ECL Gate Delay Analysed by 2D Parallel Mixed Level Device/Circuit Simulation
Matthias STECHER Bernd MEINERZHAGEN Ingo BORK Joachim M. J. KRÜCKEN Peter MAAS Walter L. ENGL 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/02/25
Vol. E77-C  No. 2 ; pp. 200-205
Type of Manuscript:  Special Section PAPER (Special Issue on 1993 VLSI Process and Device Modeling Workshop (VPAD 93))
Category: Coupled Device & Circuit Modeling
hydrodynamic modelvelocity overshootcircuit performance
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Process and Device Technologies of CMOS Devices for Low-Voltage Operation
Masakazu KAKUMU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/05/25
Vol. E76-C  No. 5 ; pp. 672-680
Type of Manuscript:  INVITED PAPER (Special Section on Low-Power and Low-Voltage Integrated Circuits)
CMOSSOISIMOXMOSFETlow-voltagelow-temperaturethreshold voltage high-speedpower-supply voltagesubthreshold currentcircuit performancepower dissipation
 Summary | Full Text:PDF