Keyword : circuit delay

A performance-Oriented Simultaneous Placement and Global Routing Algorithm for Transport-Processing FPGAs
Nozomu TOGAWA Masao SATO Tatsuo OHTSUKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A  No. 10 ; pp. 1795-1806
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
FPGAtransport processinglayout designplacement and routingperformance optimizationcircuit delay
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