Keyword : channel density

VLSI Architecture for the Low-Computation Cycle and Power-Efficient Recursive DFT/IDFT Design
Lan-Da VAN Chin-Teng LIN Yuan-Chu YU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/08/01
Vol. E90-A  No. 8 ; pp. 1644-1652
Type of Manuscript:  PAPER
Category: Digital Signal Processing
Keyword: 
channel density, high density voice over packet, high throughput, low-computation cycle, power efficiency, recursive DFT/IDFT, 
 Summary | Full Text:PDF(873.1KB)
An Optimal Channel Pin Assignment Algorithm for Hierarchical Building-Block Layout Design
Tetsushi KOIDE Shin'ichi WAKABAYASHI Noriyoshi YOSHIDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/10/25
Vol. E76-A  No. 10 ; pp. 1636-1644
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
channel pin assignment, channel routing, channel density, building-block layout, 
 Summary | Full Text:PDF(769.3KB)