Keyword : capture-power-safety

Logic-Path-and-Clock-Path-Aware At-Speed Scan Test Generation
Fuqiang LI Xiaoqing WEN Kohei MIYASE Stefan HOLST Seiji KAJIHARA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/12/01
Vol. E99-A  No. 12 ; pp. 2310-2319
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
at-speed scan testingIR-dropcapture-power-safetylogic pathclock pathclock stretchtest quality
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