Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/12/01
Vol. E99-A
No. 12 ;
pp. 2310-2319
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
at-speed scan testing, IR-drop, capture-power-safety, logic path, clock path, clock stretch, test quality, |
