Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A
No. 12 ;
pp. 3251-3257
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Design
Keyword:
crosstalk noise, capacitive coupling noise, transistor sizing, gate sizing, post-layout optimization, |
