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Fast Transient Simulation of Large Scale RLC Networks Including Nonlinear Elements with SPICE Level Accuracy
Yuichi TANJI | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/05/01
Vol. E98-A
No. 5 ;
pp. 1067-1076
Type of Manuscript:
PAPER
Category: VLSI Design Technology and CAD
Keyword:
SPICE, inductance, capacitance, signal/power integrity, FDTD, | | | Summary | Full Text:PDF | |
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De-Embedding Technique for the Extraction of Parasitic and Stray Capacitances from 1-Port Measurements
Umberto PAOLETTI Osami WADA | Publication: IEICE TRANSACTIONS on Communications
Publication Date: 2007/06/01
Vol. E90-B
No. 6 ;
pp. 1298-1304
Type of Manuscript:
Special Section PAPER (Special Section on 2nd Pan-Pacific EMC Joint Meeting--PPEMC'06--)
Category: Printed Circuit Board
Keyword:
capacitance, measurement, parasitic, de-embedding, | | | Summary | Full Text:PDF | |
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An Analytical Modeling of Three Primary Wiring Capacitance Components for Multi-Layer Interconnect Structure
Susumu KUROSAWA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1995/12/25
Vol. E78-A
No. 12 ;
pp. 1793-1798
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
capacitance, modeling, interconnect, LSI, LPE, | | | Summary | Full Text:PDF | |
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