Keyword : capacitance extraction


Capacitance Extraction of Three-Dimensional Interconnects Using Element-by-Element Finite Element Method (EBE-FEM) and Preconditioned Conjugate Gradient (PCG) Technique
Jianfeng XU Hong LI Wen-Yan YIN Junfa MAO Le-Wei LI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/01/01
Vol. E90-C  No. 1 ; pp. 179-188
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
three-dimensional interconnects (3DIs)capacitance extractionelement-by-element finite element method (FEM)pre-conditioned conjugated gradient technique
 Summary | Full Text:PDF(901.7KB)

Formula-Based Method for Capacitance Extraction of Interconnects with Dummy Fills
Atsushi KUROKAWA Akira KASEBE Toshiki KANAMOTO Yun YANG Zhangcai HUANG Yasuaki INOUE Hiroo MASUDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/04/01
Vol. E89-A  No. 4 ; pp. 847-855
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
dummy fillcapacitance extractioncapacitance formulainterconnect
 Summary | Full Text:PDF(507.9KB)

Determination of Interconnect Structural Parameters for Best- and Worst-Case Delays
Atsushi KUROKAWA Hiroo MASUDA Junko FUJII Toshinori INOSHITA Akira KASEBE Zhangcai HUANG Yasuaki INOUE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/04/01
Vol. E89-A  No. 4 ; pp. 856-864
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
interconnectworst-case delaystatic timing analysisprocess variationcapacitance extraction
 Summary | Full Text:PDF(509.1KB)

Second-Order Polynomial Expressions for On-Chip Interconnect Capacitance
Atsushi KUROKAWA Masanori HASHIMOTO Akira KASEBE Zhangcai HUANG Yun YANG Yasuaki INOUE Ryosuke INAGAKI Hiroo MASUDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12 ; pp. 3453-3462
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Interconnect
Keyword: 
capacitance formulacapacitance calculationcapacitance extractioninterconnect capacitance
 Summary | Full Text:PDF(1.1MB)

A Practical Approach for Efficiently Extracting Interconnect Capacitances with Floating Dummy Fills
Atsushi KUROKAWA Toshiki KANAMOTO Akira KASEBE Yasuaki INOUE Hiroo MASUDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/11/01
Vol. E88-A  No. 11 ; pp. 3180-3187
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
dummy filldummy metalcapacitance extractioninterconnect capacitance
 Summary | Full Text:PDF(489.6KB)

On the Use of Shanks Transformation to Accelerate Capacitance Extraction for Periodic Structures
Ye LIU Zheng-Fan LI Mei XUE Rui-Feng XUE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/06/01
Vol. E87-C  No. 6 ; pp. 1078-1081
Type of Manuscript:  LETTER
Category: Electromagnetic Theory
Keyword: 
integral equation methodcapacitance extractionseries accelerationShanks transformation
 Summary | Full Text:PDF(137.8KB)

An Advancing Front Meshing Algorithm Using NURBS for Semiconductor Process Simulation
Sangho YOON Jaehee LEE Sukin YOON Ohseob KWON Taeyoung WON 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/08/25
Vol. E83-C  No. 8 ; pp. 1349-1355
Type of Manuscript:  Special Section PAPER (Special Issue on 1999 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'99))
Category: Numerics
Keyword: 
NURBS surfacemesh generationadvancing fronttopography simulationcapacitance extraction
 Summary | Full Text:PDF(4.3MB)