| Keyword : buffer insertion
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Dummy Fill Aware Buffer Insertion after Layer Assignment Based on an Effective Estimation Model Yanming JIA Yici CAI Xianlong HONG | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/12/01
Vol. E91-A
No. 12 ;
pp. 3783-3792
Type of Manuscript:
PAPER
Category: VLSI Design Technology and CAD Keyword: VLSI, buffer insertion, physical design, DFM, dummy fill, | | Summary | Full Text:PDF | |
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Concurrent Gate Re-Sizing and Buffer Insertion to Reduce Glitch Power in CMOS Digital Circuit Design Sungjae KIM Hyungwoo LEE Juho KIM | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/01/01
Vol. E85-A
No. 1 ;
pp. 234-240
Type of Manuscript:
PAPER
Category: VLSI Design Technology and CAD Keyword: low power, glitch, gate sizing, buffer insertion, | | Summary | Full Text:PDF | |
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A Post-Layout Optimization by Combining Buffer Insertion and Transistor Sizing Sungkun LEE Juho KIM | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/10/01
Vol. E84-A
No. 10 ;
pp. 2553-2560
Type of Manuscript:
PAPER
Category: VLSI Design Technology and CAD Keyword: buffer insertion, transistor sizing, optimization, | | Summary | Full Text:PDF | |
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