Keyword : bit-parallel multiplier


Efficient Hybrid GF(2m) Multiplier for All-One Polynomial Using Varied Karatsuba Algorithm
Yu ZHANG Yin LI 
Publication:   
Publication Date: 2021/03/01
Vol. E104-A  No. 3 ; pp. 636-639
Type of Manuscript:  LETTER
Category: VLSI Design Technology and CAD
Keyword: 
varied Karatsuba algorithmbit-parallel multiplierall-one polynomialredundant representation
 Summary | Full Text:PDF(268.1KB)

Fast Bit-Parallel Polynomial Basis Multiplier for GF(2m) Defined by Pentanomials Using Weakly Dual Basis
Sun-Mi PARK Ku-Young CHANG Dowon HONG Changho SEO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/01/01
Vol. E96-A  No. 1 ; pp. 322-331
Type of Manuscript:  PAPER
Category: Algorithms and Data Structures
Keyword: 
finite field arithmeticpentanomialsbit-parallel multiplierpolynomial basisweakly dual basis
 Summary | Full Text:PDF(942.3KB)