Keyword : binary adder tree


Compact Residue Arithmetic Multiplier Based on the Radix-4 Signed-Digit Multiple-Valued Arithmetic Circuits
Shugang WEI Kensuke SHIMIZU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/09/25
Vol. E82-C  No. 9 ; pp. 1647-1654
Type of Manuscript:  Special Section PAPER (Special Issue on Integrated Electronics and New System Paradigms)
Category: Non-Binary Architectures
Keyword: 
residue number systemsigned-digit (SD) number representationend-around SD adderbinary adder treemultiple-valued circuits
 Summary | Full Text:PDF

Modulo 2p-1 Arithmetic Hardware Algorithm Using Signed-Digit Number Representation
Shugang WEI Kensuke SHIMIZU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1996/03/25
Vol. E79-D  No. 3 ; pp. 242-246
Type of Manuscript:  LETTER
Category: Computer Hardware and Design
Keyword: 
residue number systemredundant modular representationsigned-digit number representationMersenne numberbinary adder tree
 Summary | Full Text:PDF