|
| Keyword : behavioral synthesis
| |
|
Integration of Behavioral Synthesis and Floorplanning for Asynchronous Circuits with Bundled-Data Implementation
Naohiro HAMADA Hiroshi SAITO | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C
No. 4 ;
pp. 506-515
Type of Manuscript:
Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category:
Keyword:
asynchronous circuits, behavioral synthesis, floorplanning, | | | Summary | Full Text:PDF | |
| |
|
Peak Temperature Reduction by Physical Information Driven Behavioral Synthesis with Resource Usage Allocation
Junbo YU Qiang ZHOU Gang QU Jinian BIAN | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/12/01
Vol. E92-A
No. 12 ;
pp. 3151-3159
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword:
peak temperature, rebinding, reallocation, behavioral synthesis, | | | Summary | Full Text:PDF | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
|
|