Keyword : area-time product minimization


Collision Detection VLSI Processor for Intelligent Vehicles Using a Hierarchically-Content-Addressable Memory
Masanori HARIYAMA Kazuhiro SASAKI Michitaka KAMEYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/09/25
Vol. E82-C  No. 9 ; pp. 1722-1729
Type of Manuscript:  Special Section PAPER (Special Issue on Integrated Electronics and New System Paradigms)
Category: Processors
Keyword: 
hierarchical collision detectionarea-time product minimizationCAMpath planning
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