Keyword : architecture synthesis


SoC Architecture Synthesis Methodology Based on High-Level IPs
Michiaki MURAOKA Hiroaki NISHI Rafael K. MORIZAWA Hideaki YOKOTA Yoichi ONISHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A  No. 12 ; pp. 3057-3067
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: System Level Design
Keyword: 
system level designarchitecture synthesishigh level IPCAD
 Summary | Full Text:PDF

A New Approach for Datapath Synthesis of Application Specific Instruction Processor
Kyung-Sik JANG Hiroaki KUNIEDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/08/25
Vol. E80-A  No. 8 ; pp. 1478-1488
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
ASIPdatapath synthesisarchitecture synthesis
 Summary | Full Text:PDF