Keyword : architecture exploration


Fast and Accurate Architecture Exploration for High Performance and Low Energy VLIW Data-Path
Ittetsu TANIGUCHI Kohei AOKI Hiroyuki TOMIYAMA Praveen RAGHAVAN Francky CATTHOOR Masahiro FUKUI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/02/01
Vol. E97-A  No. 2 ; pp. 606-615
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
design space explorationarchitecture explorationvery long instruction-set word (VLIW) processorgenetic algorithm (GA)
 Summary | Full Text:PDF(1.6MB)

Reconfigurable AGU: An Address Generation Unit Based on Address Calculation Pattern for Low Energy and High Performance Embedded Processors
Ittetsu TANIGUCHI Praveen RAGHAVAN Murali JAYAPALA Francky CATTHOOR Yoshinori TAKEUCHI Masaharu IMAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/04/01
Vol. E92-A  No. 4 ; pp. 1161-1173
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
address generation unit (AGU)reconfigurable architectureASIP designarchitecture exploration
 Summary | Full Text:PDF(1.1MB)