Keyword : analog LSI


A Hierarchical Statistical Optimization Method Driven by Constraint Generation Based on Mahalanobis' Distance
Tomohiro FUJITA Hidetoshi ONODERA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/03/01
Vol. E84-A  No. 3 ; pp. 727-734
Type of Manuscript:  Special Section PAPER (Special Section of Selected Papers from the 13th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
analog LSIyield optimizationhierarchical designconstraint generationMahalanobis' distance
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Fully-Parallel VLSI Implementation of Vector Quantization Processor Using Neuron-MOS Technology
Akira NAKADA Masahiro KONDA Tatsuo MORIMOTO Takemi YONEZAWA Tadashi SHIBATA Tadahiro OHMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/09/25
Vol. E82-C  No. 9 ; pp. 1730-1738
Type of Manuscript:  Special Section PAPER (Special Issue on Integrated Electronics and New System Paradigms)
Category: Processors
Keyword: 
vector quantizationwinner-take-allneuron MOSimage compressionanalog LSI
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Analysis of the Effects of Offset Errors in Neural LSIs
Fuyuki OKAMOTO Hachiro YAMADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/09/25
Vol. E80-A  No. 9 ; pp. 1640-1646
Type of Manuscript:  PAPER
Category: Analog Signal Processing
Keyword: 
neural networkanalog LSIoffset errorstochastic gradient descent ruleperceptron
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Self-Learning Analog Neural Network LSI with High-Resolution Non-Volatile Analog Memory and a Partially-Serial Weight-Update Architecture
Takashi MORIE Osamu FUJITA Kuniharu UCHIMURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/07/25
Vol. E80-C  No. 7 ; pp. 990-995
Type of Manuscript:  Special Section PAPER (Special Issue on New Concept Device and Novel Architecture LSIs)
Category: Neural Networks and Chips
Keyword: 
neural networksanalog LSIfloating gate devicenon-volatile memory
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Development of Module Generators from Extracted Design Procedures--Application to Analog Device Generation--
Takashi MORIE  Hidetoshi ONODERA Keikichi TAMARU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1995/02/25
Vol. E78-A  No. 2 ; pp. 160-168
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Computer Aided Design)
Category: 
Keyword: 
device layoutmodule generationanalog LSIstore and re-usedesign procedure
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Very-High-Speed Analog Neural Network LSI Using Super Self-Aligned Si Bipolar Process Technology
Shigeki AISAWA Kazuhiro NOGUCHI Masafumi KOGA Takao MATSUMOTO Yoshihito AMEMIYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/06/25
Vol. E77-C  No. 6 ; pp. 1005-1008
Type of Manuscript:  LETTER
Category: Integrated Electronics
Keyword: 
neural networkanalog LSIoptical WDM
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Deterministic Boltzmann Machine Learning Improved for Analog LSI Implementation
Takashi MORIE Yoshihito AMEMIYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/07/25
Vol. E76-C  No. 7 ; pp. 1167-1173
Type of Manuscript:  Special Section PAPER (Special Issue on New Architecture LSIs)
Category: Neural Networks and Chips
Keyword: 
neural networkBoltzmann machineanalog LSImean-field theory learning
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Analog VLSI Implementation of Adaptive Algorithms by an Extended Hebbian Synapse Circuit
Takashi MORIE Osamu FUJITA Yoshihito AMEMIYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/03/25
Vol. E75-C  No. 3 ; pp. 303-311
Type of Manuscript:  Special Section PAPER (Special Issue on Analog LSI and Related Technology)
Category: 
Keyword: 
neural networkbackpropagationBoltzmann machineanalog LSIsynapseHebb learning
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