Keyword : all-digital phase-locked loop

A Design of 0.7-V 400-MHz All-Digital Phase-Locked Loop for Implantable Biomedical Devices
Jungnam BAE Saichandrateja RADHAPURAM Ikkyun JO Weimin WANG Takao KIHARA Toshimasa MATSUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/04/01
Vol. E99-C  No. 4 ; pp. 431-439
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design---Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
all-digital phase-locked loop, controller, digitally-controlled oscillator, phase interpolator, CMOS, MICS, 
 Summary | Full Text:PDF(1.7MB)
A Varactor-Based All-Digital Multi-Phase PLL with Random-Sampling Spur Suppression Techniques
Chia-Wen CHANG Kai-Yu LO Hossameldin A. IBRAHIM Ming-Chiuan SU Yuan-Hua CHU Shyh-Jye JOU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/04/01
Vol. E99-C  No. 4 ; pp. 481-490
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
all-digital phase-locked loop, digitally controlled oscillator, low voltage, spur suppression, low jitter, low spur, 
 Summary | Full Text:PDF(2.2MB)
A Near-Threshold Cell-Based All-Digital PLL with Hierarchical Band-Selection G-DCO for Fast Lock-In and Low-Power Applications
Chia-Wen CHANG Yuan-Hua CHU Shyh-Jye JOU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2015/08/01
Vol. E98-C  No. 8 ; pp. 882-891
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
all-digital phase-locked loop, hierarchical digitally controlled oscillators, low voltage, low power, fast lock-in, low jitter, 
 Summary | Full Text:PDF(3.6MB)
High Gain and Wide Range Time Amplifier Using Inverter Delay Chain in SR Latches
Jaejun LEE Sungho LEE Yonghoon SONG Sangwook NAM 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/12/01
Vol. E92-C  No. 12 ; pp. 1548-1550
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
time amplifier, time-to-digital converter, SR latch, high resolution delay measurement, all-digital phase-locked loop, inverter delay chain, 
 Summary | Full Text:PDF(234.8KB)