Keyword : accurate delay model


Stochastic Interconnect Tree Construction Algorithm with Accurate Delay and Power Consideration
Yibo WANG Yici CAI Xianlong HONG Yi ZOU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/05/01
Vol. E90-A  No. 5 ; pp. 1028-1037
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
interconnect optimizationaccurate delay modellow powerbuffer insertion
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