Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/07/01
Vol. E88-D
No. 7 ;
pp. 1381-1388
Type of Manuscript:
Special Section PAPER (Special Section on Recent Advances in Circuits and Systems--Part 1)
Category: Programmable Logic, VLSI, CAD and Layout
Keyword:
path delay fault, simulation, on-line pruning, ZBDD, |
