Keyword : Wallace tree

Asynchronous Array Multiplier with an Asymmetric Parallel Array Structure
Chan-Ho PARK Byung-Soo CHOI Suk-Jin KIM Eun-Gu JUNG Dong-Ik LEE 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2003/07/01
Vol. E86-D  No. 7 ; pp. 1243-1249
Type of Manuscript:  PAPER
Category: Computer System Element
array multiplierWallace treecarry save adderasynchronous multiplierasynchronous design method
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A New Algorithm for the Configuration of Fast Adder Trees
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/12/25
Vol. E83-A  No. 12 ; pp. 2426-2430
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: VLSI Architecture
multiplieradderWallace treepartial product additionDadda tree
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