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Keyword : VLSI architectures
Design and Implementation of a Low-Complexity Reed-Solomon Decoder for Optical Communication Systems
Ming-Der SHIEH
Yung-Kuei LU
Publication:
IEICE TRANSACTIONS on Information and Systems
Publication Date:
2011/08/01
Vol.
E94-D
No.
8
;
pp.
1557-1564
Type of Manuscript:
PAPER
Category:
Computer System
Keyword:
channel decoder
,
modified euclidean algorithm
,
optical communication
,
Reed-Solomon codes
,
VLSI architectures
,
Summary
|
Full Text:PDF
High-Speed Low-Complexity Architecture for Reed-Solomon Decoders
Yung-Kuei LU
Ming-Der SHIEH
Publication:
IEICE TRANSACTIONS on Information and Systems
Publication Date:
2010/07/01
Vol.
E93-D
No.
7
;
pp.
1824-1831
Type of Manuscript:
PAPER
Category:
Computer System
Keyword:
channel decoder
,
modified Euclidean algorithm
,
Reed-Solomon codes
,
VLSI architectures
,
Summary
|
Full Text:PDF
VLSI Design of a Fully-Parallel High-Throughput Decoder for Turbo Gallager Codes
Luca FANUCCI
Pasquale CIAO
Giulio COLAVOLPE
Publication:
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date:
2006/07/01
Vol.
E89-A
No.
7
;
pp.
1976-1986
Type of Manuscript:
PAPER
Category:
Digital Signal Processing
Keyword:
low-density parity-check (LDPC) codes
,
belief propagation
,
iterative decoding
,
VLSI architectures
,
parallel decoder architectures
,
Summary
|
Full Text:PDF
Self-Adaptive Algorithmic/Architectural Design for Real-Time, Low-Power Video Systems
Luca FANUCCI
Sergio SAPONARA
Massimiliano MELANI
Pierangelo TERRENI
Publication:
IEICE TRANSACTIONS on Information and Systems
Publication Date:
2005/07/01
Vol.
E88-D
No.
7
;
pp.
1538-1545
Type of Manuscript:
Special Section PAPER (Special Section on Recent Advances in Circuits and Systems--Part 1)
Category:
Adaptive Signal Processing
Keyword:
adaptive signal processing
,
low-power
,
VLSI architectures
,
image processing and multimedia systems
,
H.264
,
Summary
|
Full Text:PDF
Design of Array Processors for 2-D Discrete Fourier Transform
Shietung PENG
Igor SEDUKHIN
Stanislav SEDUKHIN
Publication:
IEICE TRANSACTIONS on Information and Systems
Publication Date:
1997/04/25
Vol.
E80-D
No.
4
;
pp.
455-465
Type of Manuscript:
Special Section PAPER (Special Issue on Parallel and Distributed Supercomputing)
Category:
Keyword:
algorithm mapping
,
2-dimensional discrete Fourier transform
,
parallel processing
,
systolic array processors
,
VLSI architectures
,
Summary
|
Full Text:PDF