Keyword : UDL/I


Conformance Test of a Logic Synthesis System to the Standard HDL UDL/I
Satoshi YOKOTA Hiroyuki KANBARA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1995/12/25
Vol. E78-A  No. 12 ; pp. 1742-1748
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
hardware description languageconformance testlogic synthesisUDL/I
 Summary | Full Text:PDF

New Trend and Future Issues of Hardware Description Language and High-Level Synthesis
Masaharu IMAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/03/25
Vol. E75-A  No. 3 ; pp. 307-313
Type of Manuscript:  INVITED PAPER (Special Section on the 4th Karuizawa Workshop on Circuits and Systems)
Category: 
Keyword: 
HDLhigh-level synthesisVHDLverilog HDLUDL/IPARTHENONSFL
 Summary | Full Text:PDF