A Fast Power Estimation Method for Content Addressable Memory by Using SystemC Simulation Environment Kun-Lin TSAII-Jui TUNGFeipei LAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2013/08/01 Vol. E96-ANo. 8 ;
pp. 1723-1729 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: content addressable memory, SystemC, power estimation, simulation,
SystemVerilog-Based Verification Environment Employing Multiple Inheritance of SystemC Myoung-Keun YOUGi-Yong SONG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/05/01 Vol. E93-ANo. 5 ;
pp. 989-992 Type of Manuscript: LETTER Category: VLSI Design Technology and CAD Keyword: SystemVerilog, SystemC, verification environment, layered-testbench, multiple inheritance,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-ANo. 12 ;
pp. 3193-3202 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Embedded, Real-Time and Reconfigurable Systems Keyword: design space exploration, system-on-a-chip (SoC), SystemC, UML, 3D graphics,
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2009/04/01 Vol. E92-BNo. 4 ;
pp. 1422-1425 Type of Manuscript: LETTER Category: Sensing Keyword: active RFID, positioning system, RTLS, SystemC,
